`ell, only one letter off.

A few years ago I canceled my spare Bell internet account because they would nolonger allow me to suspend it and resumed billing me unannounced, would not allow me to move the email to another acitve account, and would not allow me to only pay for hosting.

$25/mo for an email service that deletes my email without warning was a bit steep and I told them then to close the account.

I figured that after a couple of years the name would be released and I would be able to reopen it with my current one. This is what happened:

System		Welcome Darren {### ####}.
System		Connecting to server. Please wait...
System		Connection with server established. Please wait...
System		Balaji has joined this session!
System		Connected with Balaji
Balaji		Hi Darren {### ####}, welcome to Bell Internet Services, my name is Balaji. By looking at the option you have selected, I see that you have questions regarding your account, how may I assist you with this?
You		I am tryign to move my old emailaddress again.
You		IN 2007 I canceled a redundant account when maintaining it became too expensive.
You		I was unable to associate my original username/email with my current account.
Balaji		Sure, I'll be glad to assist you in moving your E-mail address Darren.
You		I need to do so now to consolidate my identity.
You		thankyou.
Balaji		Welcome.
Balaji		Could you give me a couple of minutes so that I'll get the information for you.
You		yes.
Balaji		Thank you for being on line.
Balaji		Once the account is terminated, the E-mail account associated with the account is also terminated.
You		However the user handle was not. I am unable to use "{####_###}"
Balaji		I apologize for the inconvenience caused to you.
You		The account { b1{######} / {#######} } still appear valid to one bill too, though I have forgotten the password.
Balaji		The E-mail also comes with the account. Once the account is terminated you can't access your E-mail Darren.
You		I never expected to; however the fact that the handle was not released is actually a good thing. It means that someone else cannot assume my identiy as easily.
Balaji		I am sorry for that.
You		Don't be, it was some major oversight that there is not an extablished proceedure for moving e-mail addresses between accounts.
Balaji		The E-mail also comes with the account when you have subscribed with Bell. Once the account is terminated you can't access your E-mail Darren.
You		... By which I mean that I have multiple bell accounts, but when I moved back to my mother's there was no mechanism by which we could keep both email's without paying full price for both accounts.
Balaji		May I have the b1 number of the active Internet service?
You		b1{######}
Balaji		Thank you.
Balaji		There is no possibility to have the {####_###}@sympatico.ca , because you account (b1{######} ) has been terminated.
You		...
You		There is no means by which the email from the terminated account can be associated with the active one?
Balaji		I have checked the information Darren you can't associate the active account. As your account is Terminated.
You		So since December of 2007 all bell customers who moved in together, got married, merged businesses, combined offices, ect. They all have had to either pay an obscene amount of money for 'just the email' or give up that identity, and the professional/personal connections therein?
Balaji		here is no possibility to have the {####_###}@sympatico.ca , because you account (b1{######} ) has been terminated.
You		Yes?
Balaji		The E-mail also comes with the account. Once the account is terminated you can't access your E-mail Darren.
You		If i were to pay to reactivate the account, would the email address then be portable?
Balaji		I do understand Darren. Unfortunately it is not possible to reactivate the account once it is terminated.
Balaji		Darren, I do understand your concern, Email is a service provided by Bell together with Internet service, and all email accounts are connected with their internet accounts.
Balaji		We cannot provide email service alone to any customer, The internet account once terminated cannot be reactivated.
Balaji		Darren, you can try to create the {####_###} email address with gmail, yahoo or hotmail.
Balaji		I appreciate your understanding in this regard.
You		THe problem is that I associated my {bank}, {portfolio} and other professional accounts with this address becasue at teh time I belived that this was safe. When emails started disappearing (becasue my ### stole the acount information and some idiot kept resettting the password for ###) I moved most things to another service, however these two accounts are permanently associated with this address unless I can countersign an email from them.
You		I understand that there is no established method for remeding this currently and I will pursue another avenue for resolution.
Balaji		I'm really sorry and I apologize for the current situation.
You		Out of morbid curiousity; Does Bell currently have a mechanism by which email-addresses be moved from active accounts can ?
Balaji		Darren, I can understand your need for the email address, however email addresses cannot be transferred to different address.
You		thank you for your efforts.
Balaji		You are welcome.
Balaji		Is there anything else that I can do for you?
You		I will be reposting this chatlog, would you like to have your screen name redacted?
Balaji		Darren, I have provided the information to you based on the actual policies of Bell.
You		Then that is all. Thankyou again.

So eventhough they know it's me, they still have the account on record, and will never use that username/email for any other purpose they will not even sell me my email and are telling me to go away.

The address cannot be moved from any account to another. The original address cannot be removed from the first account. And the account cannot be reopened for a couple of weeks for any amount of money.

It would seem that Bell is only interested in customers who are in a rut and are unprepared for / have no idea why anybody else would be on the internet.

In a nutshell;
if your situation changes for better or worse and you find yourself sharing your line with another Bell subscriber, Bell is telling you that you both would have been better off using Hotmail from the start unless you have the money to pay for two broadband connections, since Bell nolonger sells 'only email' or 'dial-up' anymore.

I am defintely going to see if I can't get bell to fix this.

'... ,' it may not be golden,

but it definitely stands out.

Another one of my duct-tape repairs.

The clic mouse nub has been loose for a while; about a week ago it got caught under the /'b/' key while I was typing and I managed to break the tabs that hold it on its cradle, rendering it useless.

Rather than waste an entire keyboard for one key or break the membrane by pressing on it directly; I decided to wrap the key to its cradle with duct tape.

It has held up fairly well, though I have to occasionally retype things where /'b/' has not turned out as expected.

Card shuffle.

This is an alternative Clone t`engineering design using the NV SRAM. It is approximately half the size of the original though most of the space is wasted. It uses less than half the components though only the SRAM array and power circuitry has been concatenated. And it is a quarter of the cost though it still is using DIP packaging. And all of this without a radical departure from B. Yahya's original design! (Yay progress!)

A casual glance at the schematic shows I have opted not to wire the address lines in normal order; this shuffling of the address lines creates new problems when programming this board. Including having to make an adapter for your logic analyser/bus sniffer if it has a hardwired hat. Needing to store the ROM image in that peculiar byte order. Debugging if it was a programming or image processing error causing a software malfunction. Having your most fastidious colleagues complain^* that you badly screwed up the design of the project citing the prefered logical order for the ICs in question, shouting that it can't possibly work.

However, this approach has strong advantages over fixed logical ordering. First: it eliminates the need for vias to satisfy an artifical ordering requirement. Second: if a competitor dumps the ROM without reverse engineering the board the image will appear corrupted. Third: Gives you something to write about. Fourth: the satisfaction of saying "I told you it would work" to you colleagues after a job well done.

Shuffling, not to be confused with stacking:

VPP 27256 VDD A12 A14 A7 A13 A6 A8 A5 A9 A4 A11 A3 OE A2 A10 A1 CE A0 D7 D0 D6 D1 D5 D2 D4 VSS D3	VPP mutant VDD A0 A1 A2 A13 A3 A4 A14 A5 A6 A7 A8 OE A9 A10 A11 CE A12 D7 D0 D6 D1 D5 D2 D4 VSS D3
Difficult hardware, hard software.

From the above we see that the address line order {A_0-20} is now
{12,11,9,8,6,14,3,2,4,5,10,7,0,13,1}. We can reason that the value stored in 0x0000 is now read from 0x0000, but the value in 0x0001 is now read from 0x0004, 0x0002 is now read from 0x0001, 0x0004 from 0x01000, etc.

The ROM chip is read externally out of order while internally the image is stored sequentially {00, 01, 02...}. The image must be distorted/mutated to match the read order else it won't be read back correctly. One method is to build an adapter for our programmer that would shuffle the address lines for us; however some ROMs do not behave well if written to non-sequentially and every design would require a different adapter. Making this a physical hardware adapter would either exaust our resources, or require constant reconfiguration, leading to inevitable calamity from loose/misplaced connections.

//Advanced Hex Editor script, does not work!

//address[write]=2^[read]
a[0]=2^12;
a[1]=2^11;
a[2]=2^9;
a[3]=2^8;
a[4]=2^6;
a[5]=2^14;
a[6]=2^3;
a[7]=2^2;
a[8]=2^4;
a[9]=2^5;
a[10]=2^10;
a[11]=2^7;
a[12]=2^0;
a[13]=2^13;
a[14]=2^1;
// base betweeen iterations, avoids an inner loop/summation.
B[0]=0;
B[14]=0;
ii=0; //because I don't feel like calculating an index for a sequential read.
D[0]=0; //Image holder.
D[32767]=0;

for(i[0]=0;i[0]<a[0];i[0]+=a[0])
 {B[0]=i[0];
 for(i[1]=0;i[1]<a[1];i[1]+=a[1])
  {B[1]=B[0]+i[1];
  for(i[2]=0;i[2]<a[2];i[2]+=a[2])
   {B[2]=B[1]+i[2];
   for(i[3]=0;i[3]<a[3];i[3]+=a[3])
    {B[3]=B[2]+i[3];
    for(i[4]=0;i[4]<a[4];i[4]+=a[4])
     {B[4]=B[3]+i[4];
     for(i[5]=0;i[5]<a[5];i[5]+=a[5])
      {B[5]=B[4]+i[5];
      for(i[6]=0;i[6]<a[6];i[6]+=a[6])
       {B[6]=B[5]+i[6];
       for(i[7]=0;i[7]<a[7];i[7]+=a[7])
        {B[7]=B[6]+i[7];
        for(i[8]=0;i[8]<a[8];i[8]+=a[8])
         {B[8]=B[7]+i[8];
         for(i[9]=0;i[9]<a[9];i[9]+=a[9])
          {B[9]=B[8]+i[9];
          for(i[10]=0;i[10]<a[10];i[10]+=a[10])
           {B[10]=B[9]+i[10];
           for(i[11]=0;i[11]<a[11];i[11]+=a[11])
            {B[11]=B[10]+i[11];
            for(i[12]=0;i[12]<a[12];i[12]+=a[12])
             {B[12]=B[11]+i[12];
             for(i[13]=0;i[13]<a[13];i[13]+=a[13])
              {B[13]=B[12]+i[13];
              for(i[14]=0;i[14]<a[14];i[14]+=a[14])
               {B[14]=B[13]+i[14];
                D[ii]=get1u(B[14]); //Gets 1-byte unsigned value at offset
                ii+=1;
               }
              }
             }
            }
           }
          }
         }
        }
       }
      }
     }
    }
   }
  }
 }
for(ii=0;ii<32767;ii+=1)
 {set1u(ii,D[ii]);}//overwrite original.

The above script uses nested loops to represent each bit of the address line. It sequentially reads the bit and stores it in the correct 'shuffled' location.

I acknowledge that there are some operands not represented in Kahei or C that would allow for a more efficient program. And that using a matrix would be far faster and more efficient. However such an approach would be far less flexible and difficult to understand. And the effort required to build one I cannot justify especially for a program that would normally only be used once. But I am a hardware guy, an expert programmer may not have the same difficulty.

---

Before I get complaints that I am being unfair to the original designer let me point out that there has been 18 years of technological development since it was created; B. Yahya had the courage (and ethic) to publish this design at a time when many companies were terrified to; The original design itself was so well done that unaltered it is possible, though not commercially viable to produce it today; And the autorouter jab is fair game as vias should not be inside an array, except where lines cannot run parallel or for thermal reasons; Also, the original was a success; wasn't it?

Clone t`engineering

Part 3: continued from Cloning for fun or profit

Copying this card is not enough, were we to make a profitable version it would need to be cheaper, and if we were reviving this product its replacement will need to be better.

To pursue both of these an understanding of the originals function, and how it functions is essential.

Schematic of the original

A quick survey of the original we see:

ICs1-16	62_1024	128K × 8 Static RAM
IC 17	27_256	256 K (32K × 8) CMOS EPROM
IC 18	74_573	8-bit D latch BUS DRIVER; 3-state
IC 19	74_590	8-bit BINARY COUNTER with output register
IC 20	74_245	Octal BUS TRANSCEIVER
ICs21,22	74_688	8-bit MAGNITUDE/IDENTITY COMPARATOR
IC 23	74_154	4-line to 16-line data SELECTOR/MULTIPLEXER
ICs24,25	74_574	8-bit D type FLIP FLOP bus driver; 3-state
IC 26	74_138	3-line to 8-line DECODER/DEMULTIPLEXER
IC 27	MAX690	WATCHDOG / Supervisory Circuit
IC 28	74_08	Quad 2-input AND gate
IC 29	74_32	Quadruple 2-input OR
		8-BIT IBM/ISA Card Edge

The most ovbious parts to save to save money on are ICs1-16.

The cheapest 0.1" pitch DIP package with 128K×8 (at the time of this article) is Digikey.com:BQ4013YMA that hit our 4.5-5.5 VCC sweet spot, is Non-Volatile (NV) SRAM eliminating the need for IC 27 and a battery, and at $25.94 per IC, it would cost $415.04 before applying the new HST and Eco taxes for enough capacity.

If we were to move to a surface mount 0.05" pitch SOP package such as the Digikey.com:IS62C1024AL with 2.0 V data retention threshold and the same VCC, it would cost $4.23 per IC, $67.68 for all sixteen.

However;
Buying Sixteen 128K×8 ICs is silly when we could subsititute a single 2048×8 IC for ICs1-16 and IC 23. Reducing our component count and board size by more than half, while remaining software compatible with the original.

ICs1-16 can only accept address lines 0-16, but each can be individually addressed, therefore IC 23 decodes address lines 17-20 and individually addresses ICs1-16. If there is only one SRAM IC then a decoder is unnecessary and can be eliminated while leaving the original software completely unaltered.


Illustration of difference in complexity between using a single surface mount IC w/ an unused or gate from the original, and the orignial's 17 ICs. Additional power circuitry required.

A single 2048K×8 DIP such as the Digikey:BQ4017M would set us back $107.84. Or a 0.0315" pitch TSOP like the $44.44 Digikey:CY7C1069AV33. Both of which are a king's ransom compared to a $7.22 Digikey:NAND512W3A2DN6E 512MB Flash 48-TSOP-II, or a modest $1.07 Digikey:SST25VF040B 4MB Flash 8-SOIC, both of which would require the use of different hardware and software.

I should be able to learn enough from reverse engineering this hardware to better understand how it works and where we might find areas of improvement.



When (IOSel=0 and Reset=0) IC26 decodes (AD_0-2,CO,RST)
When ^IC28D(IORd=1 and IOWr=1) if [(SA_3-9 is (ID₀,ID₁,00011)) and (AEN=1)] then IC22 sets (IOSel=0)
When (MemRD=0) if [(SA_13-19 is 0011011) and (Reset=0)] then IC21 sets (MemSel=0)

When (MelSel=0) IC17 decodes (D_0-7) by (SA_0-12,ID₀,ID₁)
When ^IC28B(MemSel=0 OR IOSel=0)
IC28C will turn off D1 sinking current to drive LED.
Also, If (IORd=1 and MemRd=1) IC20 loads D_0-7 onto SD_0-7
ElseIf (IORd=0 OR MemRd=0) IC20 loads SD_0-7 onto D_0-7

When (AD₀=0 and IOWR=0) IC29A sets WE=0, else WE=1

When (AD₀=0 and CS=0) IC23 decodes A_17-20 and activates the correct CS_1-16 for the SRAM array, else they are all disabled.

When AD₀ rises IC19 increments its register;
When system CLK rises IC19 outputs its register to A_0-7 // if system CLK does not cycle after AD₀ then an address is skipped!
When RST=0 IC19 resets its register

When CO=0 IC18 loads K1 onto D_0-7 // external input/jumper config

When AD₁ rises D_0-7 is loaded onto A_8-15
When AD₂ rises
D_0-4 is loaded onto A_16-20
D₅ is loaded onto CS
D_6-7 is loaded for no apparent reason // load balancing for lower quality components? to make routing the wires more difficult? To avoid colleagues complaining about not having all lines of the databus connected?

JA_3-4 pull ID_0-1 to 0 when set

The SSD's address without jumpers is 318H, with JA₃ is 10H, JA₄ is 306H, JA_3,4:300H .

	IC21		IC	28		IC26
	D	8-9	3-F	0-1	0	-F
ID	1101	100_	__11	000x	x	yyy
SA	3210	fedc	ba98	7654	3	210
0x300			b 11	0000	0	000
0x318			b 11	0001	1	000

Assuming both jumpers are set we have a IO base address (BA) of 0x300, then
BA+0 is AD₀
BA+1 is CO
BA+2:RST
BA+3:AD₁
BA+4:AD₂
(+5,+6,+7)

An IOread to 0x__302 would activate CO and IC18 would load K1 onto the system databus via IC20.
An IOwrite to 0x__302 would also activate C0, but, but IC20 would change direction and 'fight' it potentially damaging the chips - This would be bad.
Make a note that 0x__302 should be treated as read only,
Similarly any read or write to 0x__304 where bit D₅ is set, activating CS, should not be followed by an instruction that makes use of the SSD's databus except to access SRAM- this would also be bad.

Our ROM base address is 0xD8___.

A quick peek into the image reveals

seg000:002A	db	'Yatronic Silicon-Disk V2.0 (c) 1992'
seg000:004D	db	0
	...
seg000:6800	db	'                '
seg000:6810	db	' COPYRIGHT Uitg.'
seg000:6820	db	' ELEKTUUR B.V.  '
seg000:6830	db	'      BEEK      '
seg000:6840	db	' The Netherlands'
seg000:6850	db	'      1994      '
seg000:6860	db	'                '
seg000:6870	db	'Author: B. Yahya'
seg000:6880	db	'                '

Disassembly to follow.

Eazy, like riding a bike.

The EZ-USB board last mentioned on this blog in Yeah! was built a while ago. Even used some of the board art as the background to this blog. But I did not post the build logs because I must have been clicking the wrong button all along.

I'll summarize the build here:

Oddly the most arguious part of this build was getting the PCB made. There was a miscommunication and I misunderstood that the PCB design would be sent out after my boss 'did something' to the Eagle files. That never happened, instead when I went to collect the PCB I received a blank piece of photo-sensitive board and a (discount brand) transparency sheet.

In the time since I last made a board by photoengraving we had installed a new experimental etching process. A year ago we diped the boards in heated baths of feric chloride (etchant) with an array of aquarium air pumps to provide circulation. Now we had a metal cage that holds the blank PCB in a small container with twice as many aquarium pumps blasting the etchant onto the PCB, no heater. This is partly because disgruntled jokers kept bypassing the automatic shutoff and leaving it on over the weekend, but mostly because when the etchant is opaque this still will etch a board in a couple of minutes.

My lack of familiarity with the new arrangement meant that it once I had the pattern printed onto the transparency (which was unexpectedly difficult due to network problems) it took four attempts to get a useable board.

Fail #1: hot seat.
It seemed to have etched nicely when I checked it after three minutes, however when I did extract it there was a long scratch across the board that cut through rows of wires. These had to be bridged using wires, dozens of them.

There were dozens of vias too since the original design called for the lines to be brought out in signal rather than pin. These were connected using wires, dozens of them.

The vias that would be concealed by the main IC would also have allowed easy rework if the IC was off its mark. These also are to meet for specific power requirements. The new plan called for the 24 gauge wire to form a platform under the IC and bending the pins down to the board, a baker's-dozen wires, and a hundred pins.

I'd done this with a 20-SOP (0.05") and even a 48-TSOP (0.02") before and figured that it would work with a TQFP-100 (0.02"). After many attempts I could not get the vertical pins onto their pads no matter how many times I tried and I figured that the chip must be riding up at an angle on these wires.

After disturbing much of the fancy repair work I'd done earlier it seemed likely that the IC would not have enjoyed this much heat so etching another board and using 30 gauge FFC instead seemed more reasonible than continuing.

Fail #2: repeat.
Being very careful not to scratch the mask I photo-developed another board and then used a Sharpie 'industrial ink' pen to draw in the details that didn't turn out, put it into the etchant and watched.

After a few seconds it became clear that the board was not being etched evenly, and I very gingerly repositioned the board when the definition of the traces were clear in one patch, but not the rest of the board.

Eventually it became clear that part of the photo-mask was eroding but other areas were not etching. This was probably due to a combination of uneven circulation of the etchant and contamination of the board. (my colleagues were eating fried chicken and also making PCBs for their own projects) TO fix this I tried to cut the copper between traces w/ my knife and return the PCB to the etchant. This did not result in the copper being removed after a couple of minutes. So I removed the board to try again, at which point a bit of the vynil I had used to hold the board to the cage brushed against it and removed part of the normally acid proof mask.

Fail #3: cleaner is better?
After decling to go to the pub with my friends/coleagues for lunch (which I regret) I tried again.

This time thoroughly cleaning all of the equipment and replacing the photo-developer solution, to eliminate contamination. Collecting a fresh blank PCB to avoid mask voids where air has leaked in and eaten it away. Over exposing the board to make absolutely certain that not even an invisible trace of the mask remained. And finally resolving not to handle the board once it was in the etchant.

This did not work.

While I was working through the chicken my friends had left me the board was buffeted against its cage and recieved many scratches. And the over exposure caused many defects. All of which would require hundreds of wire bridges to repair.

Fail #2: the sequel
Not anticipating any greater success with the current pattern, I went ahead and tried to repair these boards and if another PCB is to be made in the same manner than a new design would be used, one that is single sided and not 'consumer ready'.

I drilled the hundreds of vias/pads by hand before heading home where I pre-soldiered the entire surface of both boards to eliminate any small break. Used the CAD files and my knife to carved every single line that did not etch from Fail #2 out of the copper cladding. Used a desklamp and a marker to highlight the dozens of breaks in the pattern.

Fail #0:
Back at work the next day I tinned a fresh chip, and positioned it on Fail #1;

It did not fit.

I did check the fit on a plain piece of paper; but the transparency was clearly out of scale when I lay it ontop. Want to know how was this was possible?

Remember the printing problems?

We have a mix of Win9x, Win2k, Mac and Linux machines, and everyone outright owns their own machine in addition to the pool of machines provided. We also for baffling reasons don't use printing permissions, so often times someone in one department will try printing to the first printer they see on the network, instead of the one they are sitting next to. And when that doesn't work they try printing again. Then when that fails they try another printer at random. And when that fails they try the first one again. ...

Now this wouldn't be an issue if we didn't have seven printers in on the main print server workgroup and another fourty in various offices. My lab's printer is the first one on the list so it is often out of toner and paper, or getting stuck when someone ques to print A4 and it only has letter and A3. To combat this IT has set the print server to always override print-settings to use HP's 'econo-mode' if a user prints twice to the same printer within a 30 minute window.



Econo-mode itself is actually quite clever. It applies a gradient to dark areas so that the edges that the human eye follows are clear but less toner is used in the middle. And the page is scaled vertically by 5-15% depending on the amount of toner used on each line, tightening line spacing and saving even more toner. All of which does not negatively affect human readable text and graphics.

But my work is technical. A 5% distortion is enough to put a sliding rule graph out by an entire order of magnitude. And even regular scaling to a PCB prevents pieces from mating, printed component to be incorrect values, IC pins sitting onto the wrong pads, header pins not fitting without breaking.

At this point I cursed and redesigned the board and stayed late to finish building the board.

Success from failure:it just never ends.
Redesigning this board a fifth time has allowed me new insight to its design. This iteration brought the board to approximately the size of a floppy disk, and there was no real need for it to be breadboard sized, and the whole peripheral plan was a bit half-baked. As a 3.25" double sided board it would have sufficient space to bring two rs232 transceivers and keep the extra leds and buttons. I've never seen a user plus the original into a breadboard and build their circuit next to it anyways, it's always three boards, one for each edge and one for the circuit.
Now it's one plus the double sided 3.25".

The tie in: product placement.
The SSD mentioned on this blog in Cloning for fun or profit can be reduced to four chips, this SoaC, voltage-level converter, power and SRAM. And the sweet part is that now the medium for loading/unloading data from the XT/AT can be a USB cable, and users can expand the capabilities of this card using software.

There are a few more posts to summarize about acually programming this chip, but I will continue that in a later post.

Cloning for fun or profit

Cloning a piece of hardware is an excelent way to learn about how it is designed, and how it works. This is often viewed as a seedy trade inwhich people bastardise the hard-work of honest engineers and other designers to produce the same product without the overhead cost of design and marketing.

Unfortunately in my experience design documentation is almost always lost and the only way to recover (or sometime resume production of) a product is to clone it and there is little discussion on techiques for achieving this.

Generally when I 'clone' a product, I build an exact replica (in so far as component layout and electrical connections). Then I go looking for what can be made cheaper. Then better. Then the maintence cycle begins.

I like to use high-resolution photography and logic probes to start with; however grainy photographed pages from a foreign trade magazine from a random website is more than enough to clone a product and start development.

Take for example the Solid State Diskdrive for the IBM XT featured on K. Giannopoulos' website (microwave.gr:Build your own Vintage PC-XT Computer). From these massive bitmaps, and roms we can produce plans for a clone and then some.

Step 1: Preparing the reference material
To obtain the reference board art start by tracing the bitmaps with Inkscape. This allows evaluation the quality of the reference material and gives me a reference for the wiring of the first clone.

Next using the outside corners as reference points calculate how much to rotate these layers to align their edges horizontally.

Top layer

• (1463.789,5.971)
  0.233716199°
• (1468.760,3.486)
  0.135987303°
0.184851751°

Bottom layer

• (1464.944,2.279)
  0.089134448°
• (1468.780,9.950)
  0.388134564°
0.238634506°

Okay;
In this example because the bottom layer is clearly out of square as the angle does not match, this could be because of perspective, a transform can fix that if it is flat. There is also noticable distortion bacause the pages were not pressed flat when the picture was taken, but maybe I will get lucky and manage to align it anyways.

Nope.

The red top layer does not completely align with the blue bottom layer. There are also a number of 'broken' traces where the line did not render very well. Even if this image was rescaled a pcb made precisely to this image the pcb would require significant repairs where the components do not fit, where the layers do not connect and where the wires are disconnected. Fixing this would be quite difficult.

If it were in alignment we could then replace the polygons with wires and convert this into gerber format using a script. But it's not so I will be drafting the board art manually. Fortunately this website also posted a schematic and parts list.


Step 2: Using the reference material.
Add all of the parts necessary to a new Eagle schematic. I found that I needed to add two 'new' comonents to the library: the three lead capacitor and the DIP32 RAM.

Working from one corner to the other recreate populate the schematic and board with approximately the same layout. Once populated wire the schematic and board as close to the original as is practical. The reference art can be coloured to track progress and distinguish different signals easier.

I think lavender is a fine colour for the data bus.

While I was doing this I made a few interesting discoveries: most significantly was the omission of CLK from the cardedge to IC19 on the original schematic, without this a clone card made only from the schematic would not work.

The secret CLK.

The Address and Data lines were also shuffled around by the orignal designer to help with board layout. This is good since even with the bits shuffled around each address is still unique and the data (provided it is always stored in the same order) will still read back correctly.
As evidenced by the vias inside the array of memorychips the previous designer got bored and used the autorouter resulting in some spectacularly stupid wiring.
I've duplicated most of the 'stupid' so that my colleagues will not harass me about differing from the original "too much", though while linking the data and address lines from the memory chips I made a hash of it since I intend to design that out entirely.

And here is the result of eleven hours of unpaid work: a clone of the original board, minus some stupid, plus some sloppyness when I got bored.


Now that we have a hardware/software compatible clone we can make it cheaper by substituting components.

Part3: to be continued


Note: I was unable to upload the PDF, SVG, brd, sch and lbr files I had intended to illustrate this post with. I am also disinclined to seekout a file host for these if nobody asks for them.

Edit: I have been contacted, links to follow.

Edit: Build your own Vintage PC-XT Computer files are availble in the Solid state disk section.

Re: Broken wire in collector cell

I am posting this here because of a post length limit on Fixya.com.

This happened to me.
If the tiny wire touches another layer in the collector cell it will short.

You could remove the wire, however that would reduce the effectiveness of your cleaner and may void your warranty.

This is how I repaired my 'broken' cell. Only attempt this if you are very good with a pair of pliers and do not mind voiding the warranty.

• Cell disassembly
  
  1. remove the collector cell from the air purifier
  
  
  2. Separate the charcoal filter and dust screen
  
  
  3. standing the cell on its edge press firmly down on the edge of the metal contact and release the tab holding it in place
     
     • The metal should lift from the plastic tab without any resistance
  
  
  4. This should expose an electrical contact rail with metal tabs folded up/down onto it. Lift and straiten these tabs
     
     • Care should be taken not to break these as these are what hold the cell together mechanically and electrically
  
  
  5. {Repeat for all four contacts}
  
  
  6. Slide the ends off of the filter and carefully remove the center combs/clips that maintain the spacing between the layers of the cell
     
     • These are held in place by plastic tabs that are rigid. These tabs will not separate easily but will break if they are bent too far.


• Layer Disassembly
  
  1. Lift the metal tabs that hold the wire in place. This is easiest by pushing the tab through the 'bottom'
     
     • In all three of my units the metal wire was wrapped around the tab before being crimped in place
  
  
  2. Unwind the wire from the tabs and set it across the tabs
  
  
  3. Crimp one end of the wire in the end tab by pressing the tab flat (back into its hole) over the wire. If you have two pieces of wire use tabs at opposite ends of the layer
     
     • Flatness is important, as any bump will create a short gap at which the voltage can leak/arc more easily
  
  
  4. Bring the loose ends to the center tab tightly and crimp those in place, being careful to wrap up an ends that could produce a spark-gap with a neighboring layer
  
  
  5. Press all of the tabs securely and trim any stray bits that could produce a short or a spark


• Suggested Cell assembly
  
  
  1. Flatten the end tabs of each layer that they can fit into the slots in the caps more easily
  
  
  2. making certain that the layers are orientated correctly and in the right order slot each one into an end cap
  
  
  3. Check that these are in the correct order!
     
     • Are the layers {flat, wire, flat, wire, flat, wire, flat, wire, flat}?
     
     
     • Is the label on the outside?
     
     
     • Is the label on the top, where the dust screen is inserted from?
     
     
     • Does the Front arrow on the label point to the dust screen?
     
     
     • Are all of the wires infront?
  
  
  4. Once you have gotten that right make certain that the contact rail is in place on the end of the cap and fold the tabs up/down securing the layers
  
  
  5. Replace the plastic combs/clips from the center of the filter
     
     • this is easiest one layer at a time
  
  
  6. Install the opposite end cap and secure those tabs
  
  
  7. Replace all four metal contacts

Note:
Oreck replaced my unit in full knowledge of my repair however, this was a gratuitous act outside of warranty. Do not expect a replacement if your repair is unsuccessful or detected.

Edit:
It has been suggested that it may not be necessary to remove the layer from the cell. I havent had to try that but will in the unlikely event that I have another wire break.

EDIT:
Fixya fix this.